This invention relates, in general, to semiconductor devices, and more particularly to a field effect transistor (FET) having a high trap concentration interface layer and a method of fabrication.
In electronic devices such as gallium arsenide FETs, it is highly desirable to maintain total current flow in the active channel of the device. A depletion layer commonly forms beneath the gate due to Schottky barrier characteristics. This depletion layer moves further into the active channel as bias on the gate is increased and reduces the amount of current between the drain and source while increasing the current in other regions of the device such as the substrate. It is extremely difficult to modulate the current outside of the active channel as it moves further away from the gate.
The current not in the active channel causes the device to become non-operational at voltages close to gate pinchoff. As is well known in the art, gate pinchoff is the total voltage required to completely deplete the active channel. If current is flowing out of the active channel and into other regions of the device, the current will be greater than zero at pinchoff. This will cause a drain on the power source even when the device is supposedly turned off. Additionally, the noise figure and gain of low current devices are seriously degraded because of the inefficient modulation of current in the substrate.